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interrupt_controller_documentation_and_example [2013/08/14 14:53] (current)
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 +====== Interrupt Controller Documentation and Example ======
 +
 +This information has been copied and pasted from files that can be accessed through the system.mss file in the Xilinx SDK so students may read it from computers that do not have the Xilinx SDK.
 +
 +===== scugic v1_02_a =====
 +
 +The generic interrupt controller driver component.
 +
 +The interrupt controller driver uses the idea of priority for the various handlers. Priority is an integer within the range of 1 and 31 inclusive with default of 1 being the highest priority interrupt source. The priorities of the various sources can be dynamically altered as needed through hardware configuration.
 +
 +The generic interrupt controller supports the following features:
 +
 +  * specific individual interrupt enabling/​disabling
 +  * specific individual interrupt acknowledging
 +  * attaching specific callback function to handle interrupt source
 +  * assigning desired priority to interrupt source if default is not acceptable.
 +
 +Details about connecting the interrupt handler of the driver are contained in the source file specific to interrupt processing, xscugic_intr.c.
 +
 +This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.
 +
 +==== Interrupt Vector Tables ====
 +
 +The device ID of the interrupt controller device is used by the driver as a direct index into the configuration data table. The user should populate the vector table with handlers and callbacks at run-time using the XScuGic_Connect() and XScuGic_Disconnect() functions.
 +
 +Each vector table entry corresponds to a device that can generate an interrupt. Each entry contains an interrupt handler function and an argument to be passed to the handler when an interrupt occurs. The user must use XScuGic_Connect() when the interrupt handler takes an argument other than the base address.
 +
 +==== Nested Interrupts Processing ====
 +
 +Nested interrupts are not enabled by default. To allow them to happen, uncomment the define '​XSCUGIC_NESTED_INTERRUPTS'​ and the proper processing in the interrupt handler will occur. Use with caution, the '​XSCUGIC_SVC_ALL_ISRS_OPTION'​ option will not be honored with nested interrupts and the stack growth can be significant.
 +
 +===== Example =====
 +<​code>​
 +/* $Id: xscugic_example.c,​v 1.1.2.2 2011/03/23 07:46:43 sadanan Exp $ */
 +/​******************************************************************************
 +*
 +* (c) Copyright 2010 Xilinx, Inc. All rights reserved.
 +*
 +* This file contains confidential and proprietary information of Xilinx, Inc.
 +* and is protected under U.S. and international copyright and other
 +* intellectual property laws.
 +*
 +* DISCLAIMER
 +* This disclaimer is not a license and does not grant any rights to the
 +* materials distributed herewith. Except as otherwise provided in a valid
 +* license issued to you by Xilinx, and to the maximum extent permitted by
 +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
 +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
 +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
 +* MERCHANTABILITY,​ NON-INFRINGEMENT,​ OR FITNESS FOR ANY PARTICULAR PURPOSE;
 +* and (2) Xilinx shall not be liable (whether in contract or tort, including
 +* negligence, or under any other theory of liability) for any loss or damage
 +* of any kind or nature related to, arising under or in connection with these
 +* materials, including for any direct, or any indirect, special, incidental,
 +* or consequential loss or damage (including loss of data, profits, goodwill,
 +* or any type of loss or damage suffered as a result of any action brought by
 +* a third party) even if such damage or loss was reasonably foreseeable or
 +* Xilinx had been advised of the possibility of the same.
 +*
 +* CRITICAL APPLICATIONS
 +* Xilinx products are not designed or intended to be fail-safe, or for use in
 +* any application requiring fail-safe performance,​ such as life-support or
 +* safety devices or systems, Class III medical devices, nuclear facilities,
 +* applications related to the deployment of airbags, or any other applications
 +* that could lead to death, personal injury, or severe property or
 +* environmental damage (individually and collectively,​ "​Critical
 +* Applications"​). Customer assumes the sole risk and liability of any use of
 +* Xilinx products in Critical Applications,​ subject only to applicable laws
 +* and regulations governing limitations on product liability.
 +*
 +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
 +* AT ALL TIMES.
 +*
 +*******************************************************************************/​
 +/​******************************************************************************/​
 +/**
 +*
 +* @file xscugic_example.c
 +*
 +* This file contains a design example using the Interrupt Controller driver
 +* (XScuGic) and hardware device. Please reference other device driver examples
 +* to see more examples of how the intc and interrupts can be used by a software
 +* application.
 +*
 +* @note
 +*
 +* None
 +*
 +* <pre>
 +*
 +* MODIFICATION HISTORY:
 +* Ver   ​Who ​ Date     ​Changes
 +* ----- ---- -------- ----------------------------------------------------
 +* 1.00a drg  01/18/10 First release
 +* </​pre>​
 +******************************************************************************/​
 +
 +/​***************************** Include Files *********************************/​
 +
 +#include <​stdio.h>​
 +#include <​stdlib.h>​
 +#include "​xil_io.h"​
 +#include "​xil_exception.h"​
 +#include "​xparameters.h"​
 +#include "​xil_cache.h"​
 +#include "​xil_printf.h"​
 +
 +#include "​xscugic.h"​
 +
 +/​************************** Constant Definitions *****************************/​
 +
 +/*
 + * The following constants map to the XPAR parameters created in the
 + * xparameters.h file. They are defined here such that a user can easily
 + * change all the needed parameters in one place.
 + */
 +#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
 +#define INTC_DEVICE_INT_ID 0x0E
 +
 +/​**************************** Type Definitions *******************************/​
 +
 +/​***************** Macros (Inline Functions) Definitions *********************/​
 +
 +/​************************** Function Prototypes ******************************/​
 +int ScuGicExample(u16 DeviceId);
 +int SetUpInterruptSystem(XScuGic *XScuGicInstancePtr);​
 +void DeviceDriverHandler(void *CallbackRef);​
 +
 +/​************************** Variable Definitions *****************************/​
 +
 +XScuGic InterruptController;​      /* Instance of the Interrupt Controller */
 +static XScuGic_Config *GicConfig; ​   /* The configuration parameters of the
 +                                       ​controller */
 +
 +/*
 + * Create a shared variable to be used by the main thread of processing and
 + * the interrupt processing
 + */
 +volatile static int InterruptProcessed = FALSE;
 +
 +static void AssertPrint(const char *FilenamePtr,​ int LineNumber){
 + xil_printf("​ASSERT:​ File Name: %s ", FilenamePtr);​
 + xil_printf("​Line Number: %d\r\n",​LineNumber);​
 +}
 +
 +/​*****************************************************************************/​
 +/**
 +*
 +* This is the main function for the Interrupt Controller example.
 +*
 +* @param None.
 +*
 +* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE.
 +*
 +* @note None.
 +*
 +****************************************************************************/​
 +int main(void)
 +{
 + int Status;
 +
 +
 + /*
 + * Setup an assert call back to get some info if we assert.
 + */
 + Xil_AssertSetCallback(AssertPrint);​
 +
 + xil_printf("​GIC Example Test\r\n"​);​
 +
 + /*
 + *  Run the Gic example , specify the Device ID generated in xparameters.h
 + */
 + Status = ScuGicExample(INTC_DEVICE_ID);​
 + if (Status != XST_SUCCESS) {
 + xil_printf("​GIC Example Test Failed\r\n"​);​
 + return XST_FAILURE;​
 + }
 +
 + xil_printf("​Successfully ran GIC Example Test\r\n"​);​
 + return XST_SUCCESS;​
 +}
 +
 +/​*****************************************************************************/​
 +/**
 +*
 +* This function is an example of how to use the interrupt controller driver
 +* (XScuGic) and the hardware device. ​ This function is designed to
 +* work without any hardware devices to cause interrupts. It may not return
 +* if the interrupt controller is not properly connected to the processor in
 +* either software or hardware.
 +*
 +* This function relies on the fact that the interrupt controller hardware
 +* has come out of the reset state such that it will allow interrupts to be
 +* simulated by the software.
 +*
 +* @param DeviceId is Device ID of the Interrupt Controller Device,
 +* typically XPAR_<​INTC_instance>​_DEVICE_ID value from
 +* xparameters.h
 +*
 +* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE
 +*
 +* @note None.
 +*
 +******************************************************************************/​
 +int ScuGicExample(u16 DeviceId)
 +{
 + int Status;
 +
 + /*
 + * Initialize the interrupt controller driver so that it is ready to
 + * use.
 + */
 + GicConfig = XScuGic_LookupConfig(DeviceId);​
 + if (NULL == GicConfig) {
 + return XST_FAILURE;​
 + }
 +
 + Status = XScuGic_CfgInitialize(&​InterruptController,​ GicConfig,
 + GicConfig->​CpuBaseAddress);​
 + if (Status != XST_SUCCESS) {
 + return XST_FAILURE;​
 + }
 +
 +
 + /*
 + * Perform a self-test to ensure that the hardware was built
 + * correctly
 + */
 + Status = XScuGic_SelfTest(&​InterruptController);​
 + if (Status != XST_SUCCESS) {
 + return XST_FAILURE;​
 + }
 +
 +
 + /*
 + * Setup the Interrupt System
 + */
 + Status = SetUpInterruptSystem(&​InterruptController);​
 + if (Status != XST_SUCCESS) {
 + return XST_FAILURE;​
 + }
 +
 + /*
 + * Connect a device driver handler that will be called when an
 + * interrupt for the device occurs, the device driver handler performs
 + * the specific interrupt processing for the device
 + */
 + Status = XScuGic_Connect(&​InterruptController,​ INTC_DEVICE_INT_ID,​
 +    ​(Xil_ExceptionHandler)DeviceDriverHandler,​
 +    (void *)&​InterruptController);​
 +
 + if (Status != XST_SUCCESS) {
 + return XST_FAILURE;​
 + }
 +
 + /*
 + * Enable the interrupt for the device and then cause (simulate) an
 + * interrupt so the handlers will be called
 + */
 + XScuGic_Enable(&​InterruptController,​ INTC_DEVICE_INT_ID);​
 +
 + /*
 + *  Simulate the Interrupt
 + */
 + Status = XScuGic_SoftwareIntr(&​InterruptController,​
 + INTC_DEVICE_INT_ID,​
 + XSCUGIC_SPI_CPU0_MASK);​
 + if (Status != XST_SUCCESS) {
 + return XST_FAILURE;​
 + }
 +
 + /*
 + * Wait for the interrupt to be processed, if the interrupt does not
 + * occur this loop will wait forever
 + */
 + while (1) {
 + /*
 + * If the interrupt occurred which is indicated by the global
 + * variable which is set in the device driver handler, then
 + * stop waiting
 + */
 + if (InterruptProcessed) {
 + break;
 + }
 + }
 +
 + return XST_SUCCESS;​
 +}
 +
 +/​******************************************************************************/​
 +/**
 +*
 +* This function connects the interrupt handler of the interrupt controller to
 +* the processor. ​ This function is seperate to allow it to be customized for
 +* each application. ​ Each processor or RTOS may require unique processing to
 +* connect the interrupt handler.
 +*
 +* @param XScuGicInstancePtr is the instance of the interrupt controller
 +* that needs to be worked on.
 +*
 +* @return None.
 +*
 +* @note None.
 +*
 +****************************************************************************/​
 +int SetUpInterruptSystem(XScuGic *XScuGicInstancePtr)
 +{
 +
 + /*
 + * Connect the interrupt controller interrupt handler to the hardware
 + * interrupt handling logic in the ARM processor.
 + */
 + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,​
 + (Xil_ExceptionHandler) XScuGic_InterruptHandler,​
 + XScuGicInstancePtr);​
 +
 + /*
 + * Enable interrupts in the ARM
 + */
 + Xil_ExceptionEnable();​
 +
 + return XST_SUCCESS;​
 +}
 +
 +/​******************************************************************************/​
 +/**
 +*
 +* This function is designed to look like an interrupt handler in a device
 +* driver. This is typically a 2nd level handler that is called from the
 +* interrupt controller interrupt handler. ​ This handler would typically
 +* perform device specific processing such as reading and writing the registers
 +* of the device to clear the interrupt condition and pass any data to an
 +* application using the device driver. ​ Many drivers already provide this
 +* handler and the user is not required to create it.
 +*
 +* @param CallbackRef is passed back to the device driver'​s interrupt
 +* handler by the XScuGic driver. ​ It was given to the XScuGic
 +* driver in the XScuGic_Connect() function call.  It is typically
 +* a pointer to the device driver instance variable.
 +* In this example, we do not care about the callback
 +* reference,​ so we passed it a 0 when connecting the handler to
 +* the XScuGic driver and we make no use of it here.
 +*
 +* @return None.
 +*
 +* @note None.
 +*
 +****************************************************************************/​
 +void DeviceDriverHandler(void *CallbackRef)
 +{
 + /*
 + * Indicate the interrupt has been processed using a shared variable
 + */
 + InterruptProcessed = TRUE;
 +}
 +</​code>​
  
interrupt_controller_documentation_and_example.txt ยท Last modified: 2013/08/14 14:53 by jk374