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lab_2_gpio_and_registers [2019/05/15 15:47]
hutch created
lab_2_gpio_and_registers [2019/05/15 15:47] (current)
hutch
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-==== GPIO and Registers ​====+==== GPIO and Register-Based Access ​====
  
 As shown in the schematic, these buttons and slide switches are attached to pins on the ZYNQ chip that can be found in the center of the ZYBO board. OK, so far, so good, but how do we access them? The logic values at the pins of the ZYBO chip can be read using a piece of hardware (IP) that I programmed into the bit-stream that you will use in the class. This IP is called General-Purpose Input/​Output (GPIO). The GPIO IP is described in the   ​{{:​ds744_axi_gpio.pdf|GPIO documentation}} that is provided by Xilinx. As shown in the schematic, these buttons and slide switches are attached to pins on the ZYNQ chip that can be found in the center of the ZYBO board. OK, so far, so good, but how do we access them? The logic values at the pins of the ZYBO chip can be read using a piece of hardware (IP) that I programmed into the bit-stream that you will use in the class. This IP is called General-Purpose Input/​Output (GPIO). The GPIO IP is described in the   ​{{:​ds744_axi_gpio.pdf|GPIO documentation}} that is provided by Xilinx.
lab_2_gpio_and_registers.txt ยท Last modified: 2019/05/15 15:47 by hutch